President
NitAl Consulting Services Inc
Phone: (503)-704-4332

Education:

• 1975-1980:
  B.S. Computer Eng.: Indian Institute of Technology Bombay India.





• 1982-1983:
  M.S. Computer Eng.: Rensselaer Polytechnic Institute, Troy NY, USA

Experience:

• 1980-1981:

• Junior Engineer: Tata Electric Co. R&D Labs Bombay. India 8085 Microprocessor based embedded process control system.

• 1983-1987:

• Hardware Engineer: Intel Co., Phoenix, Az. Multibus IO Controller Group leader Design of a ISBC-221, 80186 based IO Controller with ESDI/ST-506 disk, QIC-II tape and dual speed floppy interface. Design of a custom ASIC to allow concurrent operation of microprocessor and peripherals to memory. Interface to disk drive manufacturer vendors.

• 1987-1991:

• System Architect: Intel Co., Portland, OR. ·486, Pentium PC System Architect, Group Leader

• Architect of the asynchronous system bus to allow high performance operation at different processor operating frequencies.

• Design of Pentium and 486 CPU boards.

• Design of EISA/ISA PC compatible motherboard containing system peripherals.

• 1991-1996:

• Senior Staff Engineer: Intel, Hillsboro, OR.

• Intel Pentium-Pro Processor Architect.

• Lead Architect of the bus cluster involving two levels of cache hierarchy and a multiprocessing system bus interface for the Pentium-Pro Processor.

• Participation in microprocessor design, pre silicon validation, system validation and debug teams.

• Participation in DRAM Controller and PCI bridge chipset for a four processor server system.

• Guidance to other Intel sites in development of Pentium-Pro proliferations and PC Chipset for PCI, EISA/ISA buses.

• Interface with Intel customers for development of Cluster interconnects bridge as a building block towards a large super server.

• 1996-Current:

• Director: NitAl Consulting Services Inc. Portland OR

• Microsoft Certified Professional

• Specification development and guidance to VHDL, Verilog model development team in India for PCI, Firewire, ATA-3, DRAMs and EPLD models.

• Areas of expertise:

• PC architecture, PCI, EISA, ISA, USB, Pentium-Pro buses, Graphics, Networking, Disk IO, BIOS, Device Drivers, Firmware.

• Hardware Development Tools: Hardware simulation, Performance analysis, Xilinx, Altera, EPLD ASIC development tools

Languages:

• VHDL, Verilog, Custom HDL, X86 Assembly Language, C, Visual Basic, MSAccess

Operating Systems:

Honors & Patents:

• Multi-processor programmable Interrupt Controller system adapted to functional redundancy checking processor systems. (5,410,710)

• Multiprocessor Programmable Interrupt Controller system with separate interrupt bus and separate retry management. (5,555,420)

• Apparatus and Method for performing error correction in a Multi-processing system. (5,550,988)

• Initialization mechanism for symmetric arbitration agents.(5,515556)

• Method and apparatus for performing bus transactions in a computer system.(5,548,733)

• Method and apparatus for dynamically controlling the current maximum depth of a pipelined computer bus system. (5,561,780)

• Method and apparatus for combining unachievable write data into cache line sized write buffers.(5,572,703)